In a typical multicore processor, a power management unit (PMU) communicates with a plurality of cores and manages power consumption with respect to computing requirements. The centralized PMU face linearly scaling computing requirements as the number of cores increases. Making matters even more challenging, communication latency also increases with the number of cores. As a result, multicore processor systems that delegate substantially all power management decisions to a single, centralized PMU are likely to require power management compromises due to the sub-optimal scalability characteristics of the traditional centralized PMU paradigm. What is needed is a power management approach that scales well with the number of processors cores.